1. Field of the Invention
The present invention relates to a wafer supporting device of a sputtering apparatus, and more particularly, to a wafer supporting device of a sputtering apparatus capable of reducing arcing.
2. Description of the Prior Art
In the ultra large scale integration (ULSI) process, elements are defined by applying complicated photolithograph methods to deposited layers. Conventional deposition comprises chemical vapor deposition (CVD) and physical vapor deposition (PVD). The PVD further comprises evaporation, sputter, etc. and is widely used in metal layer deposition. For example, in a copper damascene process, a barrier layer is deposited in a trench or via before forming a copper wire to prevent the copper wire from diffusing into a dielectric layer. To comply with requirements such as high conductivity, low resistivity, qualified electron-migration-resistance, and high temperature stability, those skilled in the art utilize tantalum (Ta) or tantalum nitride (TaN) to form the barrier layer by sputtering it in the trench or via.
Please refer to FIG. 1, which is a schematic drawing of a conventional sputtering apparatus. As shown in FIG. 1, a sputtering apparatus 10 comprises a chamber 12, a metal target 14 positioned in a top portion of the chamber 12, a shield 16, and a wafer supporting device 20 for loading a subject such as a wafer 30 in copper damascene process for sputtering and for adjusting the wafer 30 to a proper position. The sputtering apparatus 10 also comprises a wafer lifter 18 for transporting the wafer 30 between the wafer supporting device 20 and a robot arm.
Please refer to FIG. 2, which is a schematic drawing of the wafer supporting device 20 of the sputtering apparatus 10 shown in FIG. 1. As shown in FIG. 2, the wafer supporting device 20 comprises a pedestal such as an electrostatic chuck (E-chuck) 22 for attracting the wafer 30 with a direct current voltage, a deposition ring 24 of ceramic material, and a cover ring 28 of metal material. The deposition ring 24 further comprising an aluminum or aluminum oxide coating. As shown in FIG. 2, the deposition ring 24 covers at least a portion of an upper surface of the E-chuck 22 for reducing exposure of the E-chuck 22 to the plasma and for preventing the E-chuck 22 from deposition of sputtered material. The cover ring 28 encircles at least a portion of the deposition ring 24 to reduce deposition of sputtered materials on both of the deposition ring 24 and the underlying E-chuck 22.
Please refer to FIG. 2 again, because sputtered metal material often deposits on the deposition ring 24, especially in a portion near the cover ring 28 as the circle 40 shown in FIG. 2, a potential difference between the deposition ring 24 and the cover ring 28 results and an arcing which attracts metal ion more easily is caused. Thus, thickness of a deposited metal film is influenced and contamination of the devices is found.
Please refer to FIG. 3, which is a schematic drawing illustrating a barrier layer sputtering result on the wafer 30. When the wafer 30 undergoes a bias sputtering process, a negative bias voltage is applied to the wafer 30 for attracting positive ions to attack a surface of the wafer 30. The attack causes a momentum transfer and makes the deposited molecules rearranged. In addition, the negative bias voltage can be increased to cause an ion bombardment in a re-sputtering method. For example, when the barrier layer 34 is deposited in a via or trench 32, the negative bias voltage is increased and the ion bombardment is caused to take off the metal material undesiredly deposited on an opening of the via trench 32 as circle 36 shown in FIG. 3. Therefore uniformity of the barrier layer 34 is improved. Please note that arcing happened in between the deposition ring 24 and the cover ring 28 not only influences thickness of the barrier layer 34 by reducing the negative bias voltage, but also influences the re-sputtering result and the uniformity of the barrier layer 34 by reducing efficiency of the ion bombardment.